Místo práce: Veľká Británie, Leicestershire, Rutland and Northamptonshire
Typ pracovní smlouvy: na plný úvazek
Požadované vzdělání: žádné specifické
Nabízený plat: 45000 - 60000 GBP / měsíčně
Počet míst: 2
NÁPLŇ PRÁCE:
CLOSING DATE 31 JANUARY 2016 Role:Working in our rapidly expanding Hardware Team, leading the v erification of highly complex videoprocessing IP cores. Job description:Verification of our World leading Image Signal Processor (ISP) IP cores.This role is critical to quality, in delivering synthesizable IP cores to multiple SoC manufacturers serving the camera and mobile devices markets.A wide breadth of experience in verification methodologies is essential, as they will play a critical role in driving our verification processes. Skills Required: * Good knowledge of verification methodologies – excellent UVM is critical * VHDL, Verilog and System Verilog * Low power design techniques * Perl, Python, tcl * Understanding of hardware design, demonstrated by experience in the field * Tools knowledge – VCS, Cadence NC, Atrenta Spyglass, Modelsim * Minimum first degree at 2:1 or above in a relevant technical subject. Desirable skills: * Debug experience * FPGA, Synopsys DC and C, C++ * Assertion based verification * Formal verification Experience Required: * Previous experience of system level verification in a commercial development environment is essential. * The successful candidate will be able to demonstrate having produced or contributed to customer facing verification reports. * Previous experience working in a hardware design function before moving into verification is required Other Requirements: * The candidate must be highly motivated, keen to make a real contribution to our range of IP and development processes. * Good communication is essential as they will be working very closely with the hardware team and algorithm engineers.
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source: https://www.ec.europa.eu/eures
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Vertifi Limited ...
Merseyside